K2 Space CorporationRemote
Senior ASIC Package Design Engineer
United States of America
Full Time
2 hours ago
$180,000 - $260,000 USD
No H1B
Key skills
ASIC package designFlip-chip BGA (FC-BGA)Multi-chip module (MCM)Substrate stack-up designBall-map strategyPower delivery network (PDN) designSignal integrity (SI)Power integrity (PI)Thermal management for ASICsSIWaveHFSSADSPackaging qualification and test methodologiesOSAT vendor collaborationAssembly
About this role
K2 Space Corporation is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. They are seeking a Senior ASIC Package Design Engineer to implement advanced ASIC package architecture with a focus on flip-chip BGA and multi-chip module solutions, collaborating with internal teams to ensure first-pass success for complex, high-speed ASICs.
Responsibilities:
- Define ASIC package architecture for FC-BGA and MCM solutions, including substrate stack-up, ball-map strategy, power delivery, signal breakout, and mechanical constraints
- Lead package-level trade studies across cost, performance, power integrity (PI), signal integrity (SI), thermal, manufacturability, and reliability
- Establish package design standards, methodologies, and best practices
- Drive detailed design of FC-BGA packages for high-pin-count ASICs with high-speed SerDes, dense power grids, and RF signal content
- Define and review substrate stack-ups, via strategies, impedance control, escape routing, and reference plane planning
- Partner with silicon, RF, and systems teams to co-optimize die floorplans and package interfaces
- Support package-level SI/PI strategy, including high-speed digital interfaces, power delivery network (PDN) design, and decoupling strategy
- Lead thermal architecture at the package level, including lid selection, TIMs, heat-spreaders, and mechanical interfaces to system cooling
- Drive material selection, substrate technology choices, and assembly process optimization
Requirements:
- Bachelor's degree in Packaging Engineering, Mechanical Engineering, Electrical Engineering, or a related field
- 5+ years of experience in ASIC package design, with deep expertise in FC-BGA
- Proven experience delivering high-pin-count, high-performance ASIC packages into production
- Strong understanding of substrate technologies and materials, SI/PI fundamentals at the package level, and thermal management for power-dense ASICs
- Fluent in SI/PI and EM simulation tools such as SIWave, HFSS, and ADS
- Experience working directly with OSATs and substrate vendors
- Knowledge of packaging qualification and test methodologies
- Experience with MCM or heterogeneous integration (chiplets, interposers, advanced laminates)
- Background in high-speed digital or mixed-signal SoCs
- Familiarity with aerospace, space, or high-reliability electronics