Develop, calibrate, and maintain timing-approximate and cycle-accurate models of memory devices, controllers, interconnects, processors, and SoC subsystems.
Perform component
and system-level performance analysis, benchmarking, and characterization across AI, server, and mobile workloads.
Select simulation tools and environments, generate or acquire representative workloads, and build performance monitoring for metrics such as latency, bandwidth, energy, and cycle-level statistics.
Collaborate with cross-functional teams and external customers to optimize architectures and provide data-driven guidance on microarchitecture tradeoffs.
Integrate and document models into larger SoC
and platform-level performance frameworks, identifying bottlenecks and recommending corrective actions.
Requirements
Bachelor's, Master's, or Ph.D. in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field
5+ years of professional experience in system architecture, performance modeling, computer architecture, SoC design, or memory systems
Demonstrated experience developing cycle-accurate models for interconnects and memory controllers in large SoC projects
Strong knowledge of hardware systems modeling, including modeling languages and simulation environments
Proficiency with programming and scripting languages such as C++ or Python.