Software Engineer, Hardware Enablement

Modular is hiring a Software Engineer, Hardware Enablement to bring up and optimize support for new accelerator platforms across its software stack. The role focuses on kernel and compiler work, debugging and performance optimization, hardware integration, and collaboration with hardware partners.

Responsibilities:

• Bring up and validate support for new hardware architectures across the Modular software stack, working across kernels, compiler infrastructure, runtime, graph execution, and model serving
• Write, port, and optimize Mojo kernels for novel accelerator architectures, establishing correctness first and iterating toward strong performance
• Investigate performance and correctness issues across layers of the stack, including kernel execution, memory movement, compiler lowering, graph decisions, synchronization, and vendor runtime behavior
• Develop a detailed understanding of new hardware platforms, including their ISA, execution model, memory hierarchy, synchronization mechanisms, compiler constraints, and vendor toolchains
• Help map important AI operators and workloads onto new architectures, understanding how operations such as matrix multiplication, convolution, reductions, and other model primitives execute efficiently on the target hardware
• Contribute to portability infrastructure, compiler integration, tooling, testing, and debugging workflows that make it easier to support additional hardware platforms over time
• Collaborate directly with hardware vendor engineers to understand platform capabilities, investigate issues, build integration tests, and improve end-to-end hardware/software integration
• Benchmark and profile workloads as hardware support matures, identifying bottlenecks and helping move new platforms from initial correctness toward production-quality performance
• Share knowledge about emerging architectures with the broader team through technical documentation, demos, design discussions, and engineering write-ups
• Participate in company events such as onsites and hackathons while contributing to Modular's collaborative and open engineering culture

Requirements:

• 5+ years of experience in high-performance computing, compiler engineering, accelerator software, systems engineering, or a closely related domain in industry or research
• Strong C++ skills and experience contributing to complex, multi-component software systems
• Hands-on experience with at least one heterogeneous programming model such as CUDA, SYCL, OpenCL, or a comparable accelerator programming environment
• Understanding of how AI operators are implemented at a low level, demonstrated through experience writing or modifying GPU kernels, custom operators, accelerator code, or working with ML frameworks such as PyTorch at the C++/systems layer
• Working knowledge of hardware concepts such as memory hierarchy, parallel execution, synchronization, data movement, and the relationship between software performance and the underlying architecture
• Experience debugging problems that cross software abstraction boundaries and an ability to systematically reason about correctness and performance
• Ability and enthusiasm to learn unfamiliar hardware platforms quickly, including becoming comfortable reading architecture manuals, ISA documentation, and vendor technical materials
• Strong communication and collaboration skills, including the ability to work effectively across compiler, runtime, kernel, and hardware teams
• A pragmatic engineering mindset that prioritizes correctness during initial bringup while understanding how to iterate methodically toward performance
• Experience with non-GPU accelerator architectures, such as DSPs, NPUs, AI ASICs, or other specialized compute hardware
• Familiarity with MLIR or LLVM compiler infrastructure
• Experience with GPU DSLs or libraries such as Triton, CUTLASS, or CuTe
• Previous experience bringing up software support for a new accelerator or hardware platform
• Experience working directly with hardware vendors or silicon engineering teams
• Experience profiling and optimizing kernels or accelerator workloads using hardware-specific performance tools
• Exposure to graph compilers and understanding how model operations are lowered, scheduled, fused, or mapped onto target hardware
• Experience with model serving or inference optimization workflows
• Familiarity with runtime concepts such as device management, memory allocation, queues, synchronization, or asynchronous execution
• Experience working on portability layers that target multiple hardware architectures