Board Support Package (BSP) Development Engineer (Remote)

Capgemini Engineering is a world leader in engineering services, bringing together a global team to help innovative companies unleash their potential. The role of Board Support Package Development Engineer involves developing and optimizing embedded graphics solutions on multi-core platforms, with a focus on performance analysis and real-time operating systems.

Responsibilities:

• Embedded graphics development experience using OpenGL
• Epic Deos experience - preferred
• Multi-Core Processor Architecture
• Strong fundamentals of multi-core processing concepts and system-level behavior
• Processor and Memory Architecture
• Memory Controller design and operation, Cache memory hierarchy (L1, L2, L3, etc.), Main memory systems (e.g., DDR)
• In-depth knowledge of shared memory access across multiple cores, including GPU interaction:
• Shared Resource Monitoring and Analysis
• Performance counters, Quality of Service (QoS) mechanisms, Techniques for Worst-Case Execution Time (WCET) computation
• Understanding of monitoring mechanisms for shared resource usage
• WCET Analysis with Interference Considerations
• I/O subsystems, GPU, SSD, FPGA
• DEOS Expertise
• Cache partitioning techniques and Resource isolation and management
• Regulatory Knowledge
• Familiarity with AC 20-193 (FAA guidance on multi-core processor certification) is a strong advantage

Requirements:

• Bachelors degree in Engineering, Electrical Engineering or Computer Science
• Must be a US Citizen or Permanent Resident
• Minimum of 6 years of relevant experience
• Graphic Processing Unit (GPU Drivers) experience
• Device driver development experience
• Linux operating system environment experience
• Arm Based Controllers experience
• Embedded graphics development experience using OpenGL
• Multi-Core Processor Architecture
• Strong fundamentals of multi-core processing concepts and system-level behavior
• Memory Controller design and operation, Cache memory hierarchy (L1, L2, L3, etc.), Main memory systems (e.g., DDR)
• In-depth knowledge of shared memory access across multiple cores, including GPU interaction
• Performance counters, Quality of Service (QoS) mechanisms, Techniques for Worst-Case Execution Time (WCET) computation
• Understanding of monitoring mechanisms for shared resource usage
• I/O subsystems, GPU, SSD, FPGA
• Cache partitioning techniques and Resource isolation and management
• Epic Deos experience
• Familiarity with AC 20-193 (FAA guidance on multi-core processor certification)