Hardware/System Engineer / Engineering Intern, 5G and 6G

InnoMountain develops technologies for the connected world by providing advanced wireless technologies and products to achieve the best customer satisfaction. We are looking for talented engineering interns to join the team, where they will play vital roles in driving technology advancement and product success across various stages of technology research, hardware and software design and development.

Responsibilities:

• Participate in technology Research and Development (R&D). technology specification design and development, product software and hardware design and development
• Participate in every stage of the technology R&D, including algorithm design, specification development, hardware and software design and development, prototyping, data analysis and other product development tasks
• Experience industrial customer-centric methodology in technology and product development; Understand the customers’ requirements, identify the features of the technology and product to meet the customers’ essential needs, design the product according to customers’ expectations
• Design specifications, algorithms and structures, evaluate and improve the designs to ensure the the technology meets all requirements; Ensure the quality of the technology and product by teamwork; Follow development procedure and execute the workflow
• High level of organizational skills to interact with both internal team members and external collaborators at every stage of algorithm design, hardware design, software design, testing, manufacturing, and customer support, to ensure delivery of the product
• Work closely with collaborators to optimize the product in alignment with industrial standards; Work closely with the customer support and marketing team to identify the key issues and make the necessary improvements according to customer feedback

Requirements:

• BS/MS/PhD in Electrical and Computer Engineering, Computer Science, Physics or related Engineering and Science fields
• Professional qualifications of teamwork, detail-oriented, procedure compliance, strong learning ability, strong ability of adaptation, multitasking and prioritization
• Strong analytical thinking and problem-solving skills, highly motivated, excellent written and verbal communication abilities; Experience of delivering high-quality technology and products to achieve customer satisfaction
• Work experience in hardware engineering and/or system engineering with the following experience in the focused area:
• Experience of either digital hardware or analog/RF hardware development; digital hardware experience includes FPGA/ASIC implementation of signal processing algorithms, RTL design verification and UVM testbench development, pipelining and latency optimization, and ASIC physical design
• Analog/RF hardware experience includes the development of MIMO antenna arrays, RF upconverter and downconverter designs, power amplifier designs, low-noise amplifier and analog beamformer development
• Experience of digital front-end and mixed signal design, including digital sampling rate adjustment, digital up-conversion and down-conversion, digital pre-distortion, digital beamforming and hybrid digital analog beamforming
• Experience of wireless PHY hardware development integrating the digital front with PHY digital implementation, the RF subsystem, and the antenna arrays. Experience of FPGA and multi-core CPU integration and optimization
• Proficient in simulation evaluation of algorithms given 5G system specifications; proficient in simulation platform development to evaluate the critical algorithms together with the hardware engineering team; proficient in machine learning techniques to evaluate algorithms with the software engineering team
• Experience in 3GPP specifications with an in-depth understanding of critical physical channels and signaling; experience in developing algorithms across digital PHY receivers and digital and analog front end; experience in 3GPP L2/L3 specifications to evaluate the scheduling algorithms and algorithms in upper layer protocol stacks
• Experience in optimizing the algorithms based on the hardware constraints in practical engineering systems; knowledge of hardware timing cycles, algorithm hardware and timing complexities, and methods to reduce the algorithm complexity in hardware
• Understanding of wireless receiver design principles and general methods; strong mathematical and theoretical capabilities in algorithm design and evaluation, including probability, signal detection and estimation, matrix theory and optimization