PQShield is a deep tech startup focused on secure hardware solutions. They are seeking a Hardware Verification Engineer to verify security-critical designs, develop automation tools, and collaborate with cross-functional teams to enhance product security and performance.
Responsibilities:
- Build and extend UVM testbenches to verify cryptographic IPs and subsystems
- Develop Python-based tools and automation to improve verification productivity
- Use formal verification creatively, writing properties beyond canned apps to prove tricky scenarios
- Debug at every level - from low-level waveforms to algorithmic mismatches
- Collaborate with design, software, and architecture teams to ensure real-world use cases are covered
- Approach designs with a "break it to make it" mindset, thinking like an attacher to expose weaknesses
- Influence and define methodologies and strategies for design verification
- Develop testbench architectures using UVM and formal-based approaches
- Define verification plans, functional coverage models, and test strategies for block and subsystem verification
- Lead verification at IP or SoC level, including effort estimation, scheduling, task assignment, and reporting progress to management
- Drive coverage closure and sign-off quality across complex designs
- Mentor junior engineers and help raise the team’s overall capability
Requirements:
- Strong background in UVM-based verification at IP and subsystem levels
- Proficiency in Python for tool development and automations
- Practical formal verification experience, beyond app-based use
- Knowledge of cryptographic algorithms (AES, SHA, ECC, etc.) and hardware/software security concepts
- Software-oriented thinking (C/C++ or scripting languages) for HW/SW co-verification
- Demonstrated leadership in planning and executing verification projects
- Self-driven, resourceful, and persistent when solving tough technical challenges
- Excellent debugging and problem solving skills with strong attention to detail