FortifyIQ is seeking a talented Hardware Design Engineer to contribute to the development and verification of advanced digital designs. The role involves working on cutting-edge ASIC and FPGA solutions while collaborating closely with cross-functional teams.
Responsibilities:
- Participate in design architecture discussions and trade-off analysis
- Write and verify RTL code for high-performance hardware components
- Support hardware bring-up and provide technical assistance during customer engagements
Requirements:
- Proficient in SystemVerilog for digital design
- Familiar with verification tools such as Questa, Incisive, or VCS
- Experience with scripting (Python, Perl, Tcl) for process automation
- Solid understanding of ASIC or FPGA logic design
- Strong self-management, communication, and organizational skills
- 5+ years of logic design experience and a BSEE degree
- Experience with ASIC synthesis, timing constraints, CDC/RDC flows
- Exposure to verification methodologies such as UVM
- Familiarity with AMBA and AXI protocols