Digital Flow Enablement Solutions Architect

Cadence is a company focused on hiring and developing leaders and innovators in technology. The role involves leading customer engagements in digital flow enablement, optimizing standard cell libraries, and collaborating with R&D on methodology improvements.

Responsibilities:

• Leading customer engagements on standard cell library optimization and RTL->GDS enablement, including techLEF creation and updates, mapping files, and general flow development
• Interfacing with customers regarding digital flow enablement and methodologies, including:
• Timing characterization, including sensitivity modeling
• Physical view generation (LEF, GDS, abstracts, etc)
• Logical view generation (LIB, CDL, Spectre, etc)
• Technology LEF creation for digital tools
• MSOA flows
• Performing design of experiments and running Genus/Innovus to validate techLEF correctness and library performance and DRC correctness
• Tempus timing flow development and validation
• Working closely with R&D on tools and methodology improvements
• Other digital P&R tasks as needed by the group
• Processes nodes range from 1.4nm to 350nm, with majority of work at GAA advanced nodes