Astera Labs is a leading provider of rack-scale AI infrastructure through innovative connectivity solutions. They are seeking a Senior Principal Hardware Systems Engineer to lead the architecture and delivery of high-performance compute platforms with a focus on PCIe subsystem design and high-speed Ethernet networking. The role involves end-to-end system design and collaboration with various engineering teams to develop cutting-edge AI platforms.
Responsibilities:
- Lead system architecture and design for high-performance compute platforms optimized for AI and accelerator-driven workloads
- Design and integrate PCIe-based subsystems including GPU, accelerator, and high-speed I/O components leveraging PCIe Gen5/6 technologies
- Define and implement GPU-enabled server platforms for AI training, inference, and HPC workloads
- Architect and optimize high-speed Ethernet networking interfaces (25G/100G/400G+) within platform designs
- Drive system-level integration across compute, networking, and storage subsystems
- Develop and validate FPGA-based solutions for system control, monitoring, and acceleration
- Lead system bring-up, debug, and validation in lab environments
- Troubleshoot complex hardware and performance issues across high-speed signaling, power, thermal, and interconnect domains
- Define and implement platform management solutions including BMC integration, telemetry, health monitoring, and system-level diagnostics
- Collaborate with cross-functional teams spanning hardware, firmware, BIOS, and OS to ensure seamless platform integration
- Partner with silicon vendors, OEMs, and hyperscalers on custom platform development aligned with Astera Labs' connectivity ecosystem
- Drive performance optimization across PCIe topology, accelerator interconnects, and memory subsystems
Requirements:
- Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field
- 12+ years of experience in hardware engineering, system design, or platform architecture
- Strong expertise in PCIe architecture and subsystem design
- Hands-on experience with GPU integration and accelerator-based system development
- Experience with high-speed Ethernet networking architecture (10G/25G/100G or higher)
- Hands-on experience with FPGA design including architecture, simulation, and validation
- Proven experience with system bring-up, hardware debugging, and platform validation
- Solid understanding of high-speed signaling, interconnects, power, and thermal optimization
- Experience with system management frameworks (BMC, telemetry, monitoring)
- Master's degree in Electrical Engineering, Computer Engineering, or a related field
- Experience in AI/ML infrastructure, GPU clusters, or hyperscale data center server platforms
- Knowledge of PCIe Gen5/Gen6, RDMA, RoCE, or similar high-performance networking technologies
- Experience with custom platform development or customer-specific hardware designs
- Familiarity with Astera Labs' connectivity solutions (retimers, switches, fabric controllers) or similar high-speed interconnect products
- Experience working with global hardware development teams
- Exposure to platform lifecycle management and fleet-level system diagnostics