Develop, deploy, and maintain PDKs (tech files, model files, rule decks, runtime code) for quantum devices and cryogenic control/readout ICs
Create device libraries and parameterized cells (PCells), translating process design rules and SPICE/model specifications into design-ready implementations
Support compact model development, parameter extraction, and correlation across TCAD, silicon data, and cryogenic characterization
Integrate and validate PDKs within EDA environments (e.g., LVS/DRC, simulation flows), including development of automation tools representing fab processes
Design test structures and test chips, and develop validation plans to ensure model accuracy and silicon correlation
Develop and execute QA workflows, including DRC/LVS test cases and release validation, to ensure high-quality customer deliveries
Analyze device and circuit data to identify variability, reliability risks, and performance trends; support yield-learning and root-cause analysis
Create and maintain PDK documentation (release notes, application notes, known issues) and communicate usage guidance to users
Collaborate cross-functionally with device, process, integration, and EDA teams to align design enablement with technology capabilities
Contribute innovative ideas that may lead to intellectual property, patents, or advanced design enablement methodologies
Requirements
BS (MS preferred) in Electrical Engineering, Microelectronics, Physics, Computer Science, or related field
~5–6+ years of experience in semiconductor design enablement, PDK development, or EDA
Strong knowledge of semiconductor device physics and electronic devices
Experience with EDA tools (e.g., Cadence Virtuoso or similar) and design flows
Experience with device modeling, test structures, or silicon validation
Familiarity with scripting (e.g., Python, Tcl, Perl) and Unix/Linux environments
Strong analytical, debugging, and problem-solving skills
Effective communication and teamwork skills; detail-oriented and self-motivated.