Collaborating with a team of other designers to implement key circuit blocks within a defined architecture
Comprehending system level impacts of block level parameters and making trade-offs as needed
Designing challenging transistor-level circuits
Preparing effective design documents and conducting engaging design reviews
Guiding layout, evaluation, and test engineering teams
Requirements
M.S. or beyond in Electrical Engineering
7+ years’ experience in CMOS design
Strong understanding of a wide range of circuits such as wide bandwidth amplifiers and comparators, switched capacitor circuits, precision voltage and current references, LDOs.
While not a must, experience in high-speed data converter or SerDes PHY design is a strong plus.
Experience in Cadence schematic capture and SPICE simulation tools.
Signal processing knowledge is a strong plus, particularly as it relates to calibration algorithms.
Experience with MATLAB, for example used as a behavioral modeling tool.
Good written and verbal communication skills, and ability to work in a large team.