Lead Micron’s workload-driven memory architecture and performance strategy across mobile and server-class platforms.
Own the end-to-end vision for workload characterization, benchmarking, and performance modeling.
Drive cross-organizational alignment spanning silicon, controllers, firmware, OS, hyperscalers, and industry partners.
Define the industry-leading benchmarking framework for Mobile and Server and maintain representative workload suites for customer scenarios.
Lead deep dives using PMU counters and identify bottlenecks in Memory controller scheduling and Drive optimizations across the relevant systems.
Drive system-level tradeoff analysis to guide product decisions and influence memory controller policies.
Establish advanced frameworks for performance modeling and modeling for future AI-first systems.
Drive end-to-end optimizations across the entire stack and partner with ecosystem teams for optimization of performance.

15–24+ years in memory systems, performance engineering, or system architecture.
Proven expertise in workload analysis and workload characterization at scale for servers and mobiles.
Strong programming experience: Python, C/C++, and system-level tooling.
Deep experience with benchmarking suites (SPEC, MLPerf , STREAM, and real-world workloads) and Linux performance tools (perf, eBPF , PMU-based profiling).
Demonstrated impact on architecture decisions and product roadmaps through cross-functional leadership.
Bachelor’s degree in Computer Science , Electrical Engineering, or related field with 15+ years of experience, OR Master’s degree with 14+ years of experience, OR PhD with 12+ years of experience.
5+ years of experience with programming languages such as Python, C, C++, or Java.

Memory Systems Performance & Workload Architect, DMTS/SMTS

Key skills