Role Overview
- Managing and reviewing the wafer level testing that supports high volume production of Silicon Photonic transceivers
- Reviewing in-line metrology and electrical test data from the Fab and connecting it to silicon photonic wafer acceptance test (WAT) and known-good die test (KGD) data to drive yield improvements
- Reviewing SPC charts to detect trends
- Overseeing a fleet of test equipment and working with engineers and operators to ensure high quality data generation
- Working with Test Engineering teams to improve test throughput
Requirements
- Advanced Degree in Engineering, Physics, Statistics, or related field
- 3-5 years of yield or metrology engineering experience in a leading-edge semiconductor fab
- Strong proficiency in wafer scale yield analysis: experience creating and reviewing Pareto charts, and analyzing wafer maps to look for spatial patterns
- Experience working with defect inspection tools and interpreting their data
- Experience working with change control systems and PLM tools
- Solid interpersonal, communication and problem-solving skills in order to interact with engineering staff, external vendors and contractors effectively.
It will also be good if you have:
- Experience managing a fleet of metrology equipment
- Proficiency in Python, and exposure to numerical and statistical packages
Tech Stack
Benefits
- Corporate Retirement Savings Plan
- Health and dental benefits
- Short-term disability, and long-term disability
- Life insurance, and AD&D – Company paid 2x base pay
- Optional or Supplemental life and AD&D insurance (Employee/Spouse/Child)
- Paid time off for holidays and Vacation
- Employee Stock Purchase Plan
- Tuition Assistance Plan
- Adoption assistance
- Employee Assistance Program/Work Life Resource Program