Key skills
Communication
About this role
Role Overview
- Design and optimize advanced SRAM / TCAM macro layouts for next-generation products.
- Ensure DRC/LVS/ERC signoff and drive first-pass silicon success.
- Collaborate with circuit, verification, and physical design teams to resolve layout issues and integrate solutions.
- Promote layout best practices and support innovation on leading-edge process nodes.
- Mentor junior team members and help achieve key project milestones.
Requirements
- Bachelor’s degree in Electrical Engineering, Computer Science, or a related field.
- 5+ years of professional experience in embedded memory layout.
- Proficiency with the Virtuoso layout editor (or other similar EDA tool).
- Experience with physical verification tools such as Calibre (DRC/LVS/ERC) or other similar tool.
- Strong communication skills and a positive mindset.
Benefits
- Health insurance
- 401(k) matching
- Flexible work hours
- Paid time off
- Professional development opportunities