Lead end-to-end system architecture and design for server platforms including x86 multi-socket and accelerator-based systems
Define and maintain multi-platform design standards and architectures that scale across product lines
Drive hardware platform development including board design, system bring-up, and validation
Oversee system-level integration across compute, storage, and interconnect subsystems — including PCIe Gen5/6 and high-speed fabric connectivity
Lead FPGA architecture and development including simulation, synthesis, validation, and common framework definition
Drive signal integrity analysis, functional validation, and defect resolution across complex hardware systems
Own hardware debug and bring-up in lab environments, ensuring seamless integration with firmware and software stacks
Provide technical leadership and mentorship to distributed engineering teams across hardware, firmware, and platform disciplines
Coordinate cross-functional activities to ensure alignment between hardware design, firmware integration, and system validation
Collaborate with customers and stakeholders on custom system solutions, technical briefings, and field issue resolution
Partner with silicon vendors, OEMs, and hyperscalers to drive platform innovation aligned with Astera Labs' connectivity ecosystem

Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field
12+ years of experience in hardware development or system architecture
Deep expertise in x86 server architecture, including multi-processor systems
Experience with FPGA and/or ASIC design including simulation, synthesis, and validation
Strong knowledge of high-speed interconnects (PCIe, UPI/QPI, Ethernet) and signal integrity principles
Proven experience with system bring-up, debug, and validation in lab environments
Experience leading complex hardware programs and cross-functional engineering teams
Strong knowledge of memory subsystems, cache coherency, and PCB design

Senior Principal Hardware System Architect

Key skills