Collaborate with a world-class group of physicists and engineers to translate quantum gate requirements into production-ready silicon.
Manage the product roadmap and subsystem delivery schedules for both commercial and research projects.
Requirements
MS or PhD in Electrical Engineering or a related field.
10+ years of post-degree experience in hardware engineering, specifically in ASIC/SoC environments.
Have gone through 2 or more complete ASIC design cycles.
Experience porting designs from FPGA prototypes to ASICs
Proficiency with RTL (SystemVerilog preferred)
Experience in implementing large digital signal processing blocks in RTL
Working knowledge of performance and limitations of ASIC fabs, partners, and design nodes as well as FPGA capabilities to guide selection of best fit for our applications
Knowledge of Cadence, Synopsys, or Siemens EDA design tools
Expertise in FPGA, microprocessor, and related digital circuit design and functions
Mixed signal design experience is a plus.
Benefits
fully paid medical, dental, and vision insurance for our employees and their dependents.
unlimited paid time off
401K company matching
short
and long-term disability
FSA
dependent care benefits
life insurance
drinks, snacks, and catered team lunches in our offices, every day!