Build the secure boot and Root of Trust foundation for a next-gen RISC-V MPU platform.
Own key pieces of secure boot and Root of Trust enablement, partner closely with architecture and hardware teams.
Help shape SoC security decisions with hands-on data from pre-silicon, FPGA, and first-silicon debug.
Design, implement, and maintain a production-quality secure boot and Root of Trust stack for a 64-bit RISC-V MPU platform.
Enable and harden the boot and firmware stack (boot flow, early platform initialization, BootROM/FSBL, U-Boot, OpenSBI/firmware handoff as applicable).
Drive OS-level enablement for security: kernel/BSP integration, Device Tree updates, reserved memory regions, firmware interfaces, and secure/non-secure boundary definitions.
Develop and debug platform security components and drivers (crypto accelerators, key services, secure storage, lifecycle/provisioning flows, anti-rollback, and attestation hooks as applicable).
Deliver security collateral as part of SDK releases: integration, validation, and developer-facing documentation (bring-up/debug notes, known issues, and release readiness).
Create tests, validate on FPGA/first silicon, and root-cause issues across HW/FW/kernel (boot, crypto, isolation, and lifecycle).

B.E./B.Tech or M.E./M.Tech in Computer Engineering, Electrical/Electronics Engineering, or a related field.
Strong experience (typically 5+ years) in low-level firmware/boot software, secure boot, and Root of Trust development on SoCs.
Expert-level C programming; comfortable reading low-level firmware and kernel-adjacent code.
Strong Linux internals knowledge: boot flow, memory management/MMU basics, privilege/isolation concepts, and system-level debugging.
Hands-on SoC/platform bring-up experience and ownership mindset for security and boot-stack quality.
Hands-on with U-Boot, Linux kernel, Device Tree, and Yocto/OpenEmbedded (or equivalent build systems).
Strong debugging skills with GDB and at least one of OpenOCD/JTAG, Lauterbach, or similar tools.
Experience working on FPGA, emulation, or early-silicon platforms for bring-up/validation.

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BootROM & Security Lead – RISC-V MPU

Key skills