Design firmware interfaces and abstractions that connect low-level hardware details with firmware layers.
Gather system requirements, perform architectural design, and review code for quality and compliance.
Develop firmware to enable memory subsystem initialization, training, and calibration algorithms.
Ensure adherence to JEDEC standards and memory design specifications across diverse memory technologies.
Validate and debug firmware on simulation models to verify design functionality and analyze timing.
Root cause and debug issues in pre-silicon and/or post-silicon environments to improve system reliability.
Collaborate with multidisciplinary teams, including digital and analog architects and RTL designers, to optimize verification processes for complex architectural and microarchitectural features.
Requirements
Bachelor's degree in Computer Engineering, Electrical Engineering, Computer Science, or a related field with 4+ years of relevant experience.
Master's degree in Computer Engineering, Electrical Engineering, Computer Science, or a related field with 3+ years of relevant experience.
PhD in Computer Engineering, Electrical Engineering, Computer Science, or a related field with 2+ years of relevant experience.
Proficiency in programming languages such as C, C++, or Python.
Experience with firmware development, debugging, and validation processes.
Knowledge of computer architecture principles and memory subsystem design.
Familiarity with GitHub code repositories and review processes.
Familiarity with BIOS EDK2 interfaces.
Experience with JEDEC specifications/standards for memory technologies.
Strong problem-solving abilities and an analytical mindset.
Effective communication skills for collaboration across teams and disciplines.